asic design

SAS Initiator Core

IntelliProp’s SAS initiator core (IPC-SS105A-HI) is an industry standard Serial-SCSI (SAS) host interface core that enables host application companies to use high throughput SAS storage devices. The protocol interface is compliant to the SAS 2.1 specification as defined by the International Committee for Information Technology Standards. The SAS initiator core is fully verified in pseudo random simulation.

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Applications of the SAS Initiator Core

The IPC-SS105A-HI is available for integration into host ASIC and FPGA designs to provide an industry
compliant SAS 6.0 Gb/s interface for host designs. Some of the target applications for the IPC-SS105A-
HI core are:

  • Internal interconnect for workstation storage
  • Enterprise storage interconnect
  • HDD hot-swap environments
  • Applications requiring smaller form factor and improved performance SCSI


Features of the SAS Initiator Core

  • Fully compliant to the SAS 6.0Gb/s industry specifications
  • AHB-Lite and FPGA specific interfaces for register access
  • Supports either SERDES or PHY layer interface
  • Fully verified with SAS Verification IP
  • Standalone test bench included
  • Synchronous design for easy integration
  • Synthesizable Verilog design


SAS Initiator Core
Xilinx Gates (LUTS)
Altera Gates (LE)


SAS Initiator Core Support
FPGA Supported

Virtex 6
Kintex 7
Zynq 7
Virtex 7
Zynq 7
Artix 7

Arria II GX
Stratix IV GX
Arria V GX
Stratix V GX
Cyclone V GX
FPGA Support Upon Request
Spartan 6
Cyclone IV GX
Evaluation Boards Support ML605
Arria II GX 3 GHz Dev Kit
Arria II GX 6 GHz Dev Kit
Stratix IV GX Dev Kit
Arria V GX Dev Kit


Click here to request a SAS Initiator Core datasheet...>

asic verification tools