asic design

SATA “Y” Bridge

The IntelliProp SATA "Y" Bridge design (IPP-SA111A-BR) provides SATA compliant connections and a standard SATA interface to access drive data as well as a direct access port for high speed data storage or retrieval. The SATA host port and the direct access port are selectable via a port select pin. The direct access port, host and device connections are speed independent allowing for speed bridging to the SATA connections.

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Features of the SATA "Y" Bridge

  • Fully compliant to the SATA Gen-1 and Gen-2 industry specifications
  • Automatically performs OOB and speed negotiation
  • Independent speed negotiation on each SATA connection
  • Direct Access port for high speed data storage or retrieval
  • Up to 2.4 Gigabytes per second throughput on the direct access port
  • Intended for integration with customer specific data acquisition logic
  • High performance with no processor or firmware requirements
  • Industry proven and qualified SATA interfaces
  • Available for application within multiple FPGA families

 

SATA "Y" Bridge Support
Xilinx
Altera
Lattice
FPGA Supported

Virtex 5 LXT
Virtex 5 FXT
Virtex 5 SXT
Spartan 6
Virtex 6
Kintex 7
Zynq 7
Virtex 7
Artix 7

Arria II GX
Cyclone IV GX
Stratix IV GX
Arria V GX
Stratix V GX
Cyclone V GX
ECP2M
ECP3
Evaluation Boards Support
ML505
ML507
SP605
SP623
ML605
ML623
KC705
Arria II GX 3GHz Dev Kit
Arria II GX 6GHz Dev Kit
Stratix IV GX Dev Kit
Arria V GX Dev Kit
Cyclone IV GX Dev Kit
Serdes Board

 

Request a SATA "Y" Bridge datasheet...>

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